As shown in FIG. 1, a typical computer system 10 has, among other components, a microprocessor 12, one or more forms of memory 14, integrated circuits 16 having specific functionalities, and peripheral computer resources (not shown), e.g., monitor, keyboard, software programs, etc. These components communicate with one another via communication paths 19, e.g., wires, buses, etc., to accomplish the various tasks of the computer system 10.
In order to properly accomplish such tasks, the computer system 10 relies on the basis of time to coordinate its various operations. To that end, a crystal oscillator 18 generates a system clock signal (referred to and known in the art as “reference clock” and shown in FIG. 1 as SYS_CLK) to various parts of the computer system 10. Modern microprocessors and other integrated circuits, however, are typically capable of operating at frequencies significantly higher than the system clock, and thus, it becomes important to ensure that operations involving the microprocessor 12 and the other components of the computer system 10 use a proper and accurate reference of time.
Accordingly, as the frequencies of modern computers continue to increase, the need to rapidly transmit data between circuit interfaces also increases. To accurately receive data, a clock signal is often transmitted to help recover data transmitted to a receiving circuit by some transmitting circuit. The clock signal determines when the data should be sampled by the receiving circuit. In some cases, the clock signal may change state at the beginning of the time the data is valid. However, this is typically undesirable because the receiving circuit operates better when the clock signal is detected during the middle of the time the data is valid. In other cases, the clock signal may degrade as it propagates from its transmission point. Such degradation may result from process, voltage, and/or temperature variations that directly or indirectly affect the clock signal. To guard against the adverse effects of poor and inaccurate clock signal transmission, a delay locked loop (“DLL”) is commonly used to generate a copy of the clock signal at a fixed phase shift with respect to the original clock signal.
FIG. 2 shows a portion of a typical computer system in which a DLL 30 is used. In FIG. 2, data 32 is transmitted from a transmitting circuit 34 to a receiving circuit 36. To aid in the recovery of the data 32 by the receiving circuit 36, a clock signal 38 is transmitted along with the data 32. To ensure that the data 32 is properly latched by the receiving circuit 36, the DLL 30 (which in FIG. 2 is shown as being part of the receiving circuit 36) regenerates the clock signal 38 to a valid voltage level and creates a phase shifted version of the clock signal 38. Accordingly, the use of the DLL 30 in this fashion ensures (1) that the data 32 is properly latched by triggering the receiving circuit 36 at a point in time in which the data 32 is valid and (2) that the clock signal 38 is buffered by the receiving circuit 36.
FIG. 3 shows a typical DLL 40. A reference clock signal, ref_clk 42, serves as an input to a phase detector 44 and a voltage-controlled delay line 46 that has a plurality of delay elements 48. An output clock signal, out_clk 50, from the voltage-controlled delay line 46 serves as an output of the DLL 40 and as a second input to the phase detector 44. The phase detector 44 compares the phase offsets between the reference clock 42 and the output clock 50 and, in turn, generates pulses on UP and DOWN signals 52 and 54 to a charge pump 56. Depending on the UP and DOWN signals 52 and 54, the charge pump 56 adds or removes charge from a filter capacitor 58 using a control voltage signal Vctrl 60. The control voltage signal 60 is then used by a bias generator 62 to produce bias voltages Vcp and Vcn 64 and 66 that control the delay of the delay elements 48 in the voltage-controlled delay line 46. Thus, the DLL 40 is used to maintain a fixed phase relationship between its input clock signal and its output clock signal.
As mentioned above, as the need for and proliferation of DLLs continues to increase with increasing processor speeds, DLL accuracy and functionality is becoming a significant and important concern for circuit designers and the like.